- 😄 Pronouns: He/Him
- I'm a 4th year computer engineering student at University of Waterloo
- I enjoy working on ASIC and FPGA designs with SystemVerilog
- I also enjoy low-level programming and systems programming, including device driver and firmware development, and operating system kernel development
- I design PCB with KiCAD
- C
- C++
- Rust
- x86 and RISC-V Assembly Language
- Verilog
- SystemVerilog
- VHDL